Re: Disabling memory refresh in UltiMax mode

From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de>
Date: Tue, 13 Dec 2011 20:25:47 +0100
Message-ID: <4EE7A6BB.8080805@laosinh.s.bawue.de>
On 12/13/2011 12:36 AM, Segher Boessenkool wrote:
>
> It would be rather easier to test for the difference between 8250
> and 8251 directly (see if the TOD is a BCD or binary counter).

Done... I have one board that got repaired at one time. The 2 CIAs are 
marked as:

6526
1685

6526A
0287 206A


I then used a simple program that wrote to the 1/10th sec register for 
the TOD to start it and ran a simple loop that just prints the contents 
of both seconds registers:

  10 POKE 56328,0:POKE56584,0
  20 ? PEEK(56329)"    "PEEK(56585)
  30 GOTO 20

The output is the same for both CIAs, they both count seconds and 'jump' 
(9 -> 16), meaning they are BCD. Therefore the '206A' marking doesn't 
indicate a 8520.


>>>>> 5710 if I remember right.
>>>>
>>>> The 5710 from the 128DCR (and 1571CR)?
>>>
>>> That's the one. Pretty obvious how they came up with that chip name,
>>> heh :-)
>>
>> Well... 5xxx = CMOS, x7xx = gate arrays. See also 5717, 5719 and 5721.
>
> Aww, but it fit so well :-)
>
> Is the 7 in 67xx/77xx/87xx the same thing? (I'm reading "gate array"
> as "random logic", none of these devices are gate arrays).

Along those lines... The x7xx-chips where always support logic. The 5710 
stretches that a bit though if it really contains the WD177x core.

  Gerrit


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Received on 2011-12-13 20:00:04

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