Re: Disabling memory refresh in UltiMax mode Re: 6510 handling of $00 and $01 registers

From: Segher Boessenkool <>
Date: Thu, 8 Dec 2011 15:01:47 +0100
Message-Id: <>
>>> The row address is the low-order 6 bits, right?
>> Low eight on the VIC-II in the C64 (there is a mask option to make  
>> it low seven, to work with 16k DRAM chips).
> Right, low 8 on the VIC-II, but I was thinking of the 4164 memory  
> chips.

Those have eight address pins, which is the row (low) address during
#RAS, and the column (high) address during #CAS.

>> Here's my PLA decode for Ultimax mode:
> Thanks. FWIW, Jens Schönefeld posted the C64 PLA truth table on  
> German Z-Netz in the autumn of 1994. He had built an adapter that  
> makes the 82S100 PLA look like a 27512 EPROM.

I got it from the net, sure.  The one that is all over the place is  
(there is a line missing), but someone noticed and posted a new one :-)

> Back then, I managed to reverse engineer the equations for all  
> signals except CASRAM, which remained too complex to be plausible.

#CASRAM is mostly "if not X and not Y and not ..."

> Verification was by a program that computes the truth table by  
> feeding all 65536 input combinations to the 8 equations, and by  
> comparing the resulting 64KB file with the PLA truth table dump.
> Some time later, it turned out that the PLA does support negation,  
> and the CASRAM equation became a lot simpler. The file on Zimmers,  
> which I originally archived on FUNET, is dated July 1995: http:// 
> If I remember correctly, I sent the chip to be read. It was from my  
> oldest C64, serial number 32xxx, with ceramic DRAM chips (350ns  
> IIRC) and 6569R1 and so on.

An antique!


       Message was sent through the cbm-hackers mailing list
Received on 2011-12-08 15:00:08

Archive generated by hypermail 2.2.0.