Re: 6561 (PAL VIC-I) interlace mode bit

From: Segher Boessenkool <>
Date: Fri, 26 Aug 2011 16:11:38 +0200
Message-Id: <>
> On Fri, Aug 26, 2011 at 11:25:37AM +0200, Anders Carlsson wrote:
>> Marko Mäkelä wrote:
>>> If I remember correctly, my demo program would switch the display  
>>> to an interlaced 8x16 font on the 6560.
>> Hm, I always thought the interlace bit on the 6560 just toggles  
>> the chip from producing 30 full (progressive) frames @ 60 Hz to  
>> producing 60 half (interlaced) frames. Does the perceived vertical  
>> resolution really improve?
> I would say that it does. Please try my test program. It switches  
> the font on every half-frame, using a video-synchronized timer  
> interrupt as a poor man's raster interrupt.

I think Anders was saying that in interlace mode, the VIC displays the
same picture on both even and odd field (but one of them shifted a half
line down).  You of course trick it into displaying a different picture
every field :-)

Btw, the 6560 datasheets say it is 262.5 lines per field for interlace
mode (like NTSC should be), and 262 for non-interlace mode; your docs
(and everything else I googled) say it is 261.  Which is wrong?

(PAL should be 312.5, your doc says 312; that's also what the VIC-II


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Received on 2011-08-26 15:00:04

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