VICSwitch Reverse Engineering

Someone gave me a VIC Switch at the ECCC show to reverse engineer.  I 
had some time over the Holiday to work on it:

http://www.jbrain.com/vicug/gallery/VICSwitch/VICSwitch_Schematic?full=1

Pete Rittwage, I know you'd asked about such an item.

The elegance of the design impresses me, simple though it might be.  
Essentially, it scans through the ATN lines using the '151, halting the 
scan if it finds a low signal.  It then connects that IEC port to the 
output port, and continues holding the line low until both ATN and DATA 
are high for .6 seconds (using '123 one shot).  The 4051s are doubled up 
to minimize path resistance, I am theorizing.  The '163 provides the 
counter, while the '138 lights up LEDs and holds non selected DATA lines 
low (I realize I forgot to label the lines on the schematic there) using 
the '05s.  The 4051 select and INH lines are massaged from the counter 
lines and the combinatorial logic outouts via '07 level shifters.

I'm less sure of the combinatorial logic is less well understood.  It 
appears the '05 and the '07 create a square wave generator, though I'd 
never seen one created from a buffer and an inverter.

As to the rest, it appears the check for activity is only done during 
the time CLK and Q0 of the counter are active, which seems strange to me 
(why gate the check based on clock and the low bit of the counter?)

Looking at the schematic, one can see the ease of expanding the design 
to allow burst mode support.

I'm considering a revamp of the design, and invite thoughts on 
features.  My idea would be to replace some of the logic with a uC, and 
possibly use 74hct4051s to avoid the level shifting and the secondary 
voltage requirement.

More ambitious ideas:

    * Drive swap functionality (using uC)
    * 4x4 parallel cross point (not sure if there's value in such a
      concept.  This would require the unit knowing what devices are on
      the various bus ports.
    * "locking" mechanism (for games that require don't play well on the
      bus).  While the switch was enabled, it would "lock" one input to
      the output.
    * This design with parallel ports for IEC drives/printers.  Ability
      to turn off "sub bus" at the box.  Not a cross point per se.

Jim

-- 
Jim Brain, Brain Innovations                                      (X)
brain@jbrain.com
Dabbling in WWW, Embedded Systems, Old CBM computers, and Good Times!
Home: http://www.jbrain.com


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