Re: External Kernal PDF

From: Rainer Buchty <>
Date: Sun, 21 Nov 2010 15:03:37 +0100 (CET)
Message-ID: <>
On Sat, 20 Nov 2010, Jim Brain wrote:

> An English translation of the article would help clarify...

The explanation is on page 7, but rather wordy, so I restrict it to the 
technical content:

The module needs to know whether ROM or RAM configuration is used for 
Kernal accesses in order to properly bank-in the external ROM. However, 
that information is not present on the Expansion port. Hence, the 
cartridge simulates a module in the BASIC space.

Whenever the VIC doesn't fully use its bus cycle (i.e. phi2=0, bus 
available). Then the "bus-free controller" starts (BF=0) and toggles a 
memory configuration according to figure 6. The address manager (AM) 
then responds with an according HIRAM setting which is stored in a 
flipflop within the RAM/ROM control (and signalled via LED D2). Whenever 
CPU or VIC signal bus access, BF=1 occurs it is checked whether a VIC 
access takes place (nothing happens here) or a CPU access: in that case, 
the Kernel-select Unit (KSU) checks whether it is an access to Kernal 
address space (signals HIRAM, Remote/RM). Upon positive check, GAME is 
pulled low (using Access Request/AR) and the cartridge is banked in. The 
AM respons with an according ROMH setting which the Kernal-access 
Control (KAC) combines with Kernal Select (KS) in order to ensure that 
no Kernal access takes place for accesses to the $A000 to $BFFF range. 
The resulting control signal (ROMH plus KA) is buffered and fed into the 
EPROM's OE signal. If the processor is done reading the external Kernal, 
KSU detaches (AR=1) and the previous memory configuration is restored.

Further care is taken in order to avoid interference with external 
modules, hence GAME and EXROM will only be switched through upon an 
access to Module memory space. Likewise, ROMH signaling to some further 
module must only occur if the corresponding memory address range is 
selected, i.e. no Kernal access takes place.

The circuitry therefore consists of the Kernel-Access Detector (KAC), 
the Select Logic (performing glitch- and crash-free switching among the 
4 EPROMs), the "Interface for more expansion" enabling further modules 
in the $8000 to $BFFF space, Write-enable Control (for RAM write 
access in slot #3) including power fail circuitry.


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Received on 2010-11-21 15:00:14

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