Re: Looking for a VHDL forum or individual help

From: Daniel Kahlin <*tlr_at_stacken.kth.se*> Date: Mon, 23 Aug 2010 20:08:20 +0200 (CEST) Message-ID: <Pine.LNX.4.62.1008232006180.31339@yxa.extundo.com> · tlr_at_stacken.kth.se

On Mon, 23 Aug 2010 Ruud@Baltissen.org wrote:

> Regarding the model, it is in fact based on my TTl6502. And Gideon
> couldn't detect any flaw :) Using this model I discussed my finding
> that IMHO all the cores I know, including Gideon's, treated NMI as
> level triggered. The docs state that the NMI in the 6502 is edge
> triggered. He agreed with my findings. But so far it never caused
> problems, so why changing it? I gave him an example where things
> could go wrong. Anyway if the docs state edge triggered, why not
> implementing it?

How would the NMI even work if it is implemented as level triggered?
It's _non_ maskable.  If strictly level triggered it will just endlessly 
retrigger the interrupt with no chance to ack, no?

/Daniel

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