From: Rainer Buchty (rainer_at_buchty.net)
Date: 2007-04-05 17:00:10
On Wed, 4 Apr 2007, Ethan Dicks wrote: > Another option *might* be to push Vcc above 5.00V (while still staying > under the 10% tolerance threshhold) and see if the ROM image "makes > more sense" with respect to bit 3. I wonder, if lowering wouldn't be better regarding weak cells or age-loss effects: http://www.rottmerhusen.com/etronisch/eraseprom/eraseprom.html According to here, EPROMs which appeared empty at 5V (after a quick erase), were restorable when VCC was lowered to about 3-4V. (The site is in German only, but Babelfish should do a fairly good job on it.) Rainer Message was sent through the cbm-hackers mailing list
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