From: Ullrich von Bassewitz (uz_at_musoftware.de)
Date: 2005-03-31 23:45:53
Hi!
On Thu, Mar 31, 2005 at 09:14:09PM +0200, fachat wrote:
> I have uploaded the final draft of v1.3 to the web
Small correction:
0010 = 65SC02 65C02 enhanched, with Z register (always zero!), some new opcodes
The 65C02 and 65SC02 do not have a Z register. You could read the STZ
instructions as "store Z register", but originally they meant just "store
zero". The interpretation as a Z register came with the MOS 65CE02 CPU, but I
think it was an afterthought, because this register is not mentioned in any
other CPU doc despite the fact that the 65C02, 65SC02 and 65816 all have the
STZ instructions.
The 65C02 and 65SC02 CPUs do also have different instruction sets. The 65SC02
CPU is missing the bit test and branch instructions available in the 65C02. If
you distinguish between 6502 and 6502+illegals, it would make sense to also
distinguish the 65SC02 and 65C02 CPUs.
And last, there's a typo: It should read "enhanced" :-)
Regards
Uz
--
Ullrich von Bassewitz uz@musoftware.de
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