RE: Question about ROM expansion for VIC-20

From: Baltissen, GJPAA (Ruud) (
Date: 2005-01-18 15:38:02

Hallo Jim,

I have given your idea a good thought but I only can repeat Marko: "> That
sounds really complicated.". Some moments address lines are used in the
normal way, connected with the addresslines of the CPU, the other moment
they have to be connected to one or another banking mechanism. To make it
worse: one moment this is for one addressline, the other moment more
addresslines are needed. One moment the OE/CE inputs have to react on one
BLK signal the other moment on more then one. As said: rather complicated.

I found a "solution": build the different configurations on one board. Then
only a few bits or switches are needed to tell what configuration has to be
activated. Some other bits/switches tell the configuration what program
inside the EPROM is to be activated. Disadvantage: rather huge. Advantage:
no special parts like CPLDs or FPGAs needed.

Hallo Marko,

> Yep, sort of. ...

May others have a look at the idea as well?

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