Re: Modern myths

Modem_at_sciboard.spd.louisville.edu
Date: 1999-04-24 07:57:18

CB>William Levak wrote:
CB>> At least that was a coherent description of the circuit.
CB>> 
CB>> I don't see where there is a problem.  We have 3 TTL level chips connected
CB>> together.  Typically a TTL chip output can drive 10 devices.  There is no
CB>> potential for chip failure here.  Remember, these are not unlimited output
CB>> drivers.  for instance, a 74LS20 will output 0.4 milliamps, maximum,
CB>> whereas it's input current is 0.1 milliamps.  The 6522, on the other hand,
CB>> can handle 1.6 milliamps.  If the 6522 is set to input, it will clearly
CB>> pull the signal to it's level, whether high or low.  The signal will then
CB>> either be close to zero volts or five volts.  This signal is fed to a ramp

CB>The Problem is that if that would be true, then the poke would not even
CB>work on the original PET. As I said in the description, in the original 
CB>PET the Sync signal (produced by an LS08) and read by VIA PB5 is fed
CB>to a 74LS20. This LS20 blanks the video signal during off-screen areas.
CB>Would the VIA, if set to output, draw the level to close to 0V, then
CB>the screen would always be completely blank.

CB>Therefore I had a look at the 74LS08 datasheets (see for example
CB>http://www.fairchildsemi.com/pf/DM/DM74LS08.html) and it indeed states
CB>that the chip can source 0.4mA on high output. But when the VIA draws
CB>up to 1.6mA, the LS08 would surely think this is a short circuit, and
CB>happily source up to 20-100mA short circuit current [1]. I guess that's 
TTL is current sourcing logic, isn't it? So, the current would be
limited to what could flow through the internal pull-up resistor from
the +5vdc rail to ground.
CB>more than the VIA can handle. As I said, not a healthy situation.
CB>From the fact that the LS20 enables the screen as it should we can then
CB>draw the conclusion that the voltage level on the line is 
CB>still above approximately 2V, which is the minimum "safe" voltage
CB>for a "1" (could be less, depending on tolerances, etc. max "0" voltage
CB>is 0.8V). But it may be close.

CB>> generator.  The actual voltage level is not relevant.  all that is
CB>> necessary is that it is high enough to trigger the ramp generator.  The
CB>> ramp generator controls the output to the deflection yoke by a feedback
CB>> network.  You cannot overdrive it.  The only potential problem is to drive
CB>> it at a frequency higher that it is intended for, and thus supplying a
CB>> higher effective power output to the deflection yoke. But, the feedback
CB>> circuit limits this also.  

CB>I don't know much about ramp generators either. But some plausibility
CB>checks:

CB>The VDrive input of the early 8032 schematics (see 
CB>http://www.funet.fi/pub/cbm/schematics/computers/pet/8032/321448.gif
CB>expects 5V for onscreen and 0V for flyback.
CB>As long as the Vdrive input is (much?) higher than 1.93V
CB>a current is simply integrated to get the ramp voltage (see oscilloscope
CB>point (4)) A diode (D602) lets the TTL output draw the charge of C601 and th
CB>ramp generator goes to 0 when it is time (see oscillscope picture (3) & (4))
CB>The DC voltage at (4) is around 1.93V (so the schematics says). 

CB>Now apply the poke to set Via PB to low output. If
CB>the ramp goes a bit above the 1.93V, and then probably above the
CB>voltage of the TTL level (that might be lower than 5V because the VIA 
CB>draws it) the flyback could be triggered earlier, because the diode
CB>drains C601 much earlier than it should.

CB>> This is about as much as I know about ramp generators.  All I can do is
CB>> repeat what several engineers have said to me.  If you try to run the ramp
CB>> generator at too high a frequency, it will simply not trigger and you will
CB>> get no output.

CB>Don't forget that we have to handle pretty old stuff, no CPUs that 
CB>analyze the video signal and check the timings or so, just simple
CB>analog electronics. Probably you could ask those engineers to 
CB>analyze this analong circuitry with the schematics?

CB>Later (see 
CB>http://www.funet.fi/pub/cbm/schematics/computers/pet/8032/8032034.gif)
CB>the analog electronics has been replaced by an integrated circuit,
CB>a TDA 1170. This could probably handle the reduced Vsync voltage.

CB>Andre

CB>[1] Only one pin and not longer than a second, otherwise....

CB>-- 
CB>Email address may be invalid. Use "fachat AT physik DOT tu-chemnitz DOT de"
CB>------Fight SPAM - join CAUCE http://www.cauce.org------Thanks, spammers...
CB>Andre Fachat, Institute of physics, Technische Universitšt Chemnitz, FRG
CB>		http://www.tu-chemnitz.de/~fachat
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