Myths or Fact?

From: Todd S Elliott (eyethian_at_juno.com)
Date: 1999-04-24 01:16:38

Passing along Jim Butterfield's response.

Enjoy.
-Todd Elliott
===============================
On Fri, 23 Apr 1999, William Levak said: 

> I can make no sense out of this message.

I would not want Mr. Levak to be confused, and don't know if typing
or transposition errors might have befuddled him.

So here's a detailed and proofread list of addresses involved:

   E810  59408  PIA (6520) Peripheral A I/O Port/Directional Reg
   E811  59409  PIA (6520) CRA Control Register
   E840  59456  VIA (6522) I/O Port B
   E842  59458  VIA (6522) Data Direction Register B

Now, let's recap.  Slowly.

Users of early PETs (pre-16K) discovered that they could accelerate
printing to the screen by switching bit 5 of the VIA Data Direction
Register B (at 59458) to "output" instead of "input".

The way this worked was this:  that bit 5 of the corresponding VIA
I/O Register B was normally an input which showed when the PET screen
raster was in retrace.  The early operating system did not put
characters to screen memory unless retrace was seen.  Andre Fachat
has quoted the ROM code that does this.

For some reason, Mr. Levak has gotten the impression that this bit,
and its corresponding POKE, have something to do with the EOI signal
on the IEEE bus, and that it was rewired in revisions of the circuit
board so that the EOI occupied this place alone.  Not so.

There was indeed a change in the connecting circuitry; this happened
long before the CRT controller and change to 16/32K architecture.
The POKE that we thought was a clever speedup on the original PET 2001
now started to cause chip failures.  Levak doesn't believe it?  Tough.
It happened.  And it had nothing to do with the EOI signal.

Let's go to the point where Levak fantasizes that the EOI signal had
something to do with the retrace input.  To recap the chips:

   E840  59456  VIA (6522) I/O Port B
   E842  59458  VIA (6522) Data Direction Register B
   E810  59408  PIA (6520) Peripheral A I/O Port/Directional Reg
   E811  59409  PIA (6520) CRA Control Register

Levak seemed to think that the EOI input signal, bit 6 of E810 (59408)
had something to do with retrace.  It didn't.  He seemed to think
that the related circuitry on the PIA was rewired to separate the
EOI input and video signal; they were never connected.

There was, however, an interesting setup at E811, 59409.  This control
register needs a little more description (from the manufacturer's
data sheet):

    "Control Register CRA (figure omitted):
     .. the control registers allow the microprocessor to control
     the operation of the interrupt lines (CA1, CA2) and peripheral
     control line (CA2)..."
Note that on the early PET computers, CA2 was used as an output
port to control both screen blanking and EOI out.  Note also that
on these machines, interrupt line CA2 was not used.
    "Peripheral A Peripheral Control Lines (CA2, bits 3-5):
     ... CA2 can act as a totally independent interrupt input ..."
It was not used this way on the PETs.
    "... or as a peripheral control output."
Yup, that's how it was used.
    "In the output mode (CRA, bit 5 = 1) CA2 can operate
     independently to generate a simple pulse ... A second
     output mode allows .. a 'handshake .. "
Nope, didn't use either of those features.
    "The final output mode can be selected by setting bit 4 of CRA
     to 1.  In this mode, CA2 is a simple peripheral control
     output which can be set high or low ..."
That's how it was used in the PET.
Output, right?  Has nothing to do with detecting retrace, right?
Yes, it sent output to both the EOI and the screen-blank, but
that didn't hurt anything, and there was no need to rewire it.
The screen would blink briefly when a user wrote to the IEEE,
but there was no harm - one output driving two devices is not
that strange an occurrence, and poses no technical dangers.
Levak seems to imagine that this connection was changed from
output to input for some mysterious reason; but I've never
heard of that being done.  The only retrace POKE that I know of
took place in a VIA register, as indicated above.

When a CRT controller was introduced (with the 16K/32K models)
the screen-blank line was no longer connected.  However, this
happened in early 1979; the change to the circuitry on the VIA
(bit 6 of the VIA (6522) I/O Port B at 59456) took place at a
much earlier date.

With the introduction of the 16/32K units and the associated
CRT controller, "..screen snow and 'scroll-up flash' has been
eliminated thanks to dynamic screen RAMs.." (quote from Jim
Russo, The Transactor, May 1979); there was no further need
for the retrace signal to be fed into the system.

                      --Jim

___________________________________________________________________
You don't need to buy Internet access to use free Internet e-mail.
Get completely free e-mail from Juno at http://www.juno.com/getjuno.html
or call Juno at (800) 654-JUNO [654-5866]
-
This message was sent through the cbm-hackers mailing list.
To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tcm.hut.fi.

Archive generated by hypermail 2.1.1.