Re: VIC-registers

From: Andre Fachat (
Date: 1998-03-02 12:09:54

Marko Mäkelä wrote:
> But I think that $d031-$d03f would work with external decoding logic.  The
> VIC-II will return $FF when these addresses are read or written, and the
> data on the bus will simply be ANDed with $FF, i.e. no effect.  The only
> problem is that you need quite much decoding logic (to tap all 16 address
> lines).

IFF the VIC-II does _not_ return _anything_, i.e. does not drive the bus
this _might_ work. If the VIC drives the bus high, you may fry your VIC
when the other chip drives the bus low!
Just because this somehow works on the PET (when two I/O ICs are
selected at the same time) doesn't mean it is good design and doesn't
mean it always works.

I made a daughterboard to replace the SID, with the SID on the board 
again, splitting the $D400 area to $D400-$D5FF for the SID and 
$D600 to $D7FF for the ACIA (and later the UART) for a serial line
Schematics on my homepage
(Although the UART version cannot completely be switched off as could
have been done with the ACIA - I simply modified the old board and
the different CPU interface of the UART made it impossible without 
larger modification)


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Andre Fachat, Institute of physics, Technische Universität Chemnitz, FRG

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