Re: I/O Expander

From: Andre Fachat (a.fachat_at_physik.tu-chemnitz.de)
Date: 1998-01-06 02:23:35

MagerValp wrote:

> Andre> Nevertheless one has to handle the Phi2 delay issue when
> Andre> connecting a 6522 -- but any CBM hacker should know that
> Andre> already... :-)
> 
> Shame on me for not knowing... :) What's the phi2 delay issue?

No problem. The 6522 expects the address and select lines to be
valid at the rising edge of Phi2. In the C64, however, the
VIC has control over the address lines during Phi2 low.
When Phi2 rises, the VIC enables the CPU bus drivers by releasing
AEC. Then the CPU address is on the bus, but quite late for the
6522. The normal behavior is to delay the rising edge of Phi2
by one pixel clock with some hardware to fit the 6522 timing.
The 6551 (as well as the 6525, 6526, 6521) doesn't seem to suffer
from this as it evaluates the address and select lines when 
Phi2 is high - the 6522 seems to sample them with the rising edge.

Andre

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Andre Fachat, Institute of physics, Technische Universitšt Chemnitz, FRG
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