From: Marko Mäkelä (marko.makela_at_hut.fi)
Date: 2002-06-24 13:58:22
Gideon Zweijtzer wrote:
> Yes we are talking about the same thing. I am just trying to hint to a way
> to obtain elegant equations from a truth table. If you would read out the
> PLD like an EPROM, just the way you and others did it
(Side note: I didn't read any PLAs as an EPROM; I've only analysed the
resulting binary images.)
> case inputvector is
> when "000" => outputvector <= '0';
> when "001" => outputvector <= '0';
> when "010" => outputvector <= '1';
> -- ... etc
> end case;
Okay, that's just a different way of putting it. But I would expect a
VHDL tool to crash if it was fed 2^20=1048576 lines like that. Want to
give it a try? I haven't done any VHDL stuff, and I don't have easy
access to any commercial software, including Microsoft Windows.
Converting the binary data to your proposed format or to CNF or DNF is
straightforward with a few lines of Perl or C.
> If you want to improve readability, you can replace the words inputvector
> and outputvector to a set of signal names that are actually used on the
> Commodore board.
Yes, but labeling doesn't eliminate "don't care" variables or reduce the
number of terms in a CNF or DNF equation, which is (in my opinion) the
main reason of unreadability. In the worst case, each output can be a
function of all 20 inputs (I'm assuming that the C128 PLA has 20 inputs).
Marko
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