roel.janssen_at_frontierd.com
Date: 2002-04-22 10:19:21
I tried to post this e-question before, but my sender-address was wrong,
therefore the e-mail was bounced. This one should work...
What did you do with the two-phase clock ?
Greetz,
Roel
>|> Last weekend I implemented an extra feature to the 6510 FPGA. It is now
>|> possible to connect the 6510 board to the PC by means of a serial
cable.
>A
>|> simple UART inside the CPU (that runs at a fixed bitrate of approx.
>115200)
>|> gives access to the CPU-bus by means of a simple protocol. This
hardware
>|> protocol-block is capable of generating internal DMA cycles. In other
>words,
>|> it is now possible to look in the C-64's memory or write into the
C-64's
>|> memory while the C-64 is running.
>|
>|In other words, you made the first in-circuit emulator for the C64,
>|right? ;-)
>
>Well, basically, yeah... you could put it that way. It started out just as
a
>CPU though, I didn't have any intentions of making an ICE. At this point I
>can't use this UART to 'see' the internal registers, but this would be a
>small step. The sad part is that I would have to 'pull' these registers up
>to the top level of the design. This makes the VHDL code a bit sloppy.
>
>|BTW: what's your opinion, should it be possible to modify your design
>|for emulating a 8501 CPU (the heart of C16 / C116 / Plus/4)?
>
>Of course, that shouldn't be a problem; I think it is just a 6502 with
some
>tiny modifications. I am planning to implement the 65816 as well, since
>there are many users.
>
>Gideon
>
>
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