From: Marko Mäkelä (Marko.Makela_at_HUT.FI)
Date: 2002-04-18 09:56:39
On Thu, 18 Apr 2002, Gideon Zweijtzer wrote: > So the original CPU writes random data to $0 and $1, but still does a write, > right? The data it writes is not random. On the C128, if you enable the 2 MHz mode and make sure that the video chip is not refreshing the memory at the critical moment, you can write a desired value there, I think it was with ldx #1:sta $ff,x (which will copy the value from $ff to $0 in the RAM). On the C64, the data to be written has to be fetched by the video chip. > So there should be no problem in just writing the actual contents of > $0 and $1 also into memory. It depends on what level of compatibility you want to achieve. What about the built-in temperature sensor of the 6510, are you going to support that? :-) > Yes, I agree; it will break a lot of video timing stuff. I could put some > effort in making my 6510 implementation completely 6510 cycle-compliant, but > I want to focus on the faster CPU. I hope that you consider releasing your work under an open source license, so that others can concentrate on producing a cycle compliant implementation. Maybe it would be possible to integrate a NMOS 6502 compatible processor, a video chip and some audio stuff on the same FPGA, if there are so many spare gates on the chip? I guess the I/O chips should be placed on a separate FPGA, as otherwise you'd run out of pins. > This implies that the program counter is always one cycle ahead > already, which introduces a problem for a few instructions like a > branch when it is taken. (Also for the implied instructions, since the > PC is already fetching the second byte of the next instruction while > executing the implied instruction! Of course I could stall the CPU for > one cycle in this case, so the timing would look like 2 cycles again.) If you simply stalled the processor there, I believe you would be closer to the real 6510. Have you read the document <URL:http://www.funet.fi/pub/cbm/documents/chipdata/64doc>? > Besides; I still have to look into the possibility of using the > internal block RAM for the registers. I am just afraid that I can't > write two registers in one cycle and this might be needed in some > cases. Maybe you should keep some of the special registers outside the block RAM? Marko Message was sent through the cbm-hackers mailing list
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