This shouldn't be too hard :) Is the hardware configured to ROML/ROMH/IO by the RESET signal or does is depend strictly on IOINIT to configure it that way? The hardware that controls the banking function is in the PLA right? I.E. R6510 is strictly a bi-directional I/O register and the banking logic is external to the 6510, right? ===== Get a FREE 6Mb webmail box from go6502! - http://www.geocities.com/profdredd __________________________________________________ Do You Yahoo!? Yahoo! Auctions - buy the things you want at great prices http://auctions.yahoo.com/ - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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