Re: Plus/4 RS232 woes

From: smf <smf_at_null.net>
Date: Thu, 6 Sep 2018 07:24:23 +0100
Message-ID: <05a425ec-19a9-9aaf-a72d-69da2070acef@null.net>
On 06/09/2018 01:00, Jim Brain wrote:
>
> I have no idea how one would ever prove the design intent.  Even if 
> the decap shows no special logic in the clock paths, you would still 
> argue that does not show design intent.
>
No. If the TxC clock always goes through the clock circuit that 
generates a clock from a crystal, then it doesn't matter too much if the 
chip designer thought about 115200 specifically. It would show that the 
chip was designed to use a crystal or clock interchangeably, with an 
optional divider & the guy who wrote the datasheet documented the use 
cases he thought of and not how the chip worked.

If the /16 case tries to switch some part of the clock circuit off, 
because they assumed you don't want to generate a clock from a crystal, 
then it would be clear it wasn't intended to use external clock mode 
with a crystal. If this is the case then it would be nice to know how it 
still works & whether it's got any issues.

I don't know which one is more likely, I find it interesting that the 
divider table would not be linear.

     1, 2304, 1536, 1048, 856, 768, 384, 192, 96, 64, 48, 32, 24, 16, 12, 6
Received on 2018-09-06 09:00:05

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