Re: 6500/1 ROM Archival

From: Jim Brain <brain_at_jbrain.com>
Date: Mon, 30 Jul 2018 00:41:40 -0500
Message-ID: <a866a6f3-809a-a86a-76f7-529d2c85a238@jbrain.com>
On 7/8/2018 7:10 AM, silverdr@wfmh.org.pl wrote:
>> On 2018-07-04, at 23:40, Jim Brain <brain@jbrain.com> wrote:
>>
>>> https://github.com/Project-64/reloaded/blob/master/1520/extraction/main.c#L169
>>>
>>>      for(i = 0; i< sizeof(code);i++) {
>>> 	send_data(0xA9);
>>> 	send_data(code[i]);
>>> 	send_data(0x85);
>>> 	send_data(0x00 + i);
>>> 	TEST_OFF();
>>> 	send_data(0);  // extra cycle
>>> 	TEST_ON();
>>>      }
>>>
>>> Now, I didn't re-read the threads, so it is possible it was mentioned in
>>> there, and isn't an unclear thing at all, but isn't that clearly the
>>> cycle in which the STA (85) opcode must access the zero page to store
>>> the value there?
>> It is.  I reread the posting and mentally made a note to update SIlverDream, but have not done so.
> Please do :-) Or should we just drop that paragraph and maybe add some comment in the extraction source?
>
I am working to add comments in the code, but here's some description:

WIth TEST_ON(), you are feeding opcodes into the 6500/1 from the AVR, 
and in the code above, you are sending the ML:

lda #code[i]

sta zp:i

after the sta and the i is sent, you have to drop out of TEST mode so 
that CPU can access on board memory.  The same is true when we try to 
load the specific memory location in the "brute force" mode of reading a 
byte and then resetting the machine.

Jim


-- 
Jim Brain
brain@jbrain.com
www.jbrain.com
Received on 2018-07-30 08:00:07

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