> On 2018-06-14, at 07:05, Jim Brain <brain@jbrain.com> wrote: > >> Roger that. I am about something a litte different though. Something like: the CPU puts some data into a buffer and goes about its other businesses. Once it returns it finds the data processed by a DMA capable circuit that reads the data left by the 6502/6510, processes it and writes back to the same (or another) RAM area. All that without actually stopping the CPU. I heard there were some DMA implementations that worked in such way. > > I don't think you need DMA for that. Using shared memory (PHI clock sharing, like I have implemented before) will accomplish the bulk of what you want. Probably yes. It's a matter of wording but to my understanding it's also a form of DMA. And I need to get the CPU off the buses, which means tri-state capable buffers for 6502. Or do you have a more clever way of doing this? > You'd only need DMA if you want to push the memory into the second CPU faster. You could. > DMA a block of memory from local to remote. CPU is stopped for this action > Have second CPU operate on data > Set a flag > CPU watches for the flag (or interrupt). > When found, DMA the memory back Thinking aloud - I wonder if actually dropping the first buffer wouldn't work too. Like instead of putting the data to RAM buffer, putting it directly to the other processor's port would suffice. I think yes. That would mean that the main CPU would be doing its various jobs and occasionally putting the outcome of one of them to the port at the other chip. That other chip would process it and "transparently" (for the main CPU) write the outcome to RAM (or even another device/chip) -- SD! - http://e4aws.silverdr.com/Received on 2018-06-14 18:00:05
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