On 03/14/2018 06:24 PM, smf wrote: > On 14/03/2018 16:51, Mia Magnusson wrote: > >> Well, if you add hardware to disconnect TED from RAM you could make a >> circuit that syncs on hsync (I guess you'd need a sync separator for >> that) and counts clock cycles and disconnects TED from RAM and forces >> AEC high during those 5 cycles. :) > > If you're messing with timing then use ram that is rated at double the > speed of the CPU when the screen is off and interleave the CPU and TED, > forcing AEC high all the time. It will be simpler than trying to figure > out where the refresh cycles are and it will run fast even with the > screen on. You can't leave AEC high all the time even if you run the RAM at double speed compared to now. The 8501 will not take its address lines offline, so when TED does an access, you will have to take AEC LOW to prevent bus drivers in CPU und TED fighting each other. GerritReceived on 2018-03-14 22:38:23
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