Re: 6502 stack register at reset

From: Segher Boessenkool <segher_at_kernel.crashing.org>
Date: Sun, 26 Nov 2017 13:27:55 -0600
Message-ID: <20171126192755.GQ10515@gate.crashing.org>
On Sun, Nov 26, 2017 at 02:13:38PM +0100, Spiro Trikaliotis wrote:
> * On Sat, Nov 25, 2017 at 04:15:52PM -0600 Segher Boessenkool wrote:
> > On Sat, Nov 25, 2017 at 10:03:49PM +0100, Spiro Trikaliotis wrote:
> > > That is, if you have RAM at $0100-$01FF and you do not use that area for
> > > anything else, why should the CPU crash at all as long as you do not
> > > push more than 256 byte on it?

> > See for example the 6530.  It has 64 bytes of RAM and some I/O registers,
> > and only 10 address lines.  The "simple" example in the MCS6500 hardware
> > manual has the RAM selected at xxxxxx0x11xxxxxx and the I/O at
> > xxxxxx1111xxxxxx.  So, stack accesses to $01c0..$01ff go to RAM, but also
> > e.g. zero-page accesses to $00c0..$00ff go to the *same* RAM.
> 
> That falls under the clause "if you have RAM at $0100-$01FF and you do
> not use that area for anything else, ..." ;)

This was not in the original question though, and not something the CPU
designers (or designers of earlier and smaller systems) could rely on.

> I was just curious to find out if the CPU might have a problem here, for
> example with a wrap-around while doing a JSR or an RTS, and the values
> being stored to/restored from $0100 and $01FF.
> 
> There is nothing know about this, is it?

Everything is known about that.  There is no such problem.  Unless you
qualify FUD :-)

The hardware has no problem at all with the stack starting just anywhere
and wrapping around.  Some software will not be so happy, and people
debugging on the system will not either, and the non-determinism will
make it much harder to properly test the system as well.  Trade that
off to three bytes of code ;-)


Segher

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Received on 2017-11-26 20:00:02

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