Interesting approach. Regarding the detection of $fffe on the address bus, I suppose a MCU can do that. Forget interrupt service routines in the MCU and just poll the GPIO in a loop for $fffe and perhaps chipselect also, break the loop then watch for bit 8 or 9 at a specific time after that and set the bank on the larger EPROM. Perhaps an atmega at 32MHz will do it ? or perhaps an stm32 or other of choice, but they must be 5v tolerant. Ok i changed my mind. Link the kernals to the firmware of an stm32f0. Have it replace the eprom also. The stm is cheap and 5V tolerant. -- View this message in context: http://cbm-hackers.2304266.n4.nabble.com/Switchless-ROMs-tp4662130p4662176.html Sent from the cbm-hackers mailing list archive at Nabble.com. Message was sent through the cbm-hackers mailing listReceived on 2016-12-27 15:00:02
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