Re: MAX Machine PLA equations

From: Michał Pleban <lists_at_michau.name>
Date: Sat, 06 Aug 2016 19:24:44 +0200
Message-ID: <57A61D5C.90101@michau.name>
Hello!

Segher Boessenkool wrote:

> No, the paddle regs need reading, and the counters do (wave form,
> envelope of chan 3).  The MAX has the paddles wired up (with a 4066
> no less) so it is meant to be used :-)

Right, I forgot the paddles. I saw them work so the SID must be readable
:-) So really I have no explanation.

> Probably.  There are two schematics of the MAX in circulation, both
> different, and both wrong it seems.  Or they are for different generations
> hardware.  But neither has this dealt with afaics.

I think one is for Rev A and another for Rev B? These boards are
different (for example, Rev B has SID "audio in" line connected whereas
Rev A does not).

> If nothing drives an address line it will hold its value for a value,
> and eventually drop to 0.  There is nothing that would pull the line
> one way or the other as far as I can see.

So maybe that's what's happening, the lines drop to 0 (how fast?) so
that there is no issue with the IO chios at $Dxxx?

Regards.
Michau.

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Received on 2016-08-06 18:00:51

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