Re: FPGATED

From: Gerrit Heitsch <*gerrit_at_laosinh.s.bawue.de*> Date: Mon, 25 Jul 2016 22:30:52 +0200 Message-ID: <0d9548c0-8e26-c644-7552-1af203630b2a@laosinh.s.bawue.de> · gerrit_at_laosinh.s.bawue.de

On 07/25/2016 10:14 PM, Hegedűs István wrote:
> Hi,
>
> Wow these look large in the real hardware. Craignell looks better
> however I have checked its specification and for Craignell 1 I could not
> find information on the vcc and gnd pin configuration possibilities.
> Craignell 2 is an overkill and it doesn’t support pin 5 for vcc which
> the 8501 would need... I believe the 8501 could be implemented in a
> Craignell 1 with an XC3S100E. The XC3S500E has more than enough
> resources for a whole C16 with 16k RAM but it is again an overkill.
>
> By the way while testing FPGATED I have noticed that certain demos
> identify it as an emulator... I have not yet debugged it however I
> believe the demo identifies it via the CPU (illegal opcodes?). Although
> the 6502 core I am using is from fpga64 and implements the illegal
> opcodes. It would be good to test FPGATED with a real 6502/8501...

There could also be something about the TED emulation that doesn't quite 
work yet. Maybe the more obscure things like the writable X- and 
Y-counters not behaving 100% correct yet?

  Gerrit

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