On Monday 08 April 2013, you wrote: > That's what I meant. Clearing the "screen disable" bit (bit 4 at SCROLY > register) is the soft way to get rid of bad lines, used in many timing > critical operations. If this bit is (as I expect) cleared on power-up then > at least the bad lines are not interfering and there would be no need to > monitor the extra line. its not cleared on reset .... -- http://www.hitmen-console.org http://magicdisk.untergrund.net http://www.pokefinder.org http://ftp.pokefinder.org Aus Fehlern wird man klug. Darum ist einer nicht genug. Message was sent through the cbm-hackers mailing listReceived on 2013-04-08 21:00:52
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