Re: CIAs and PLA in a CPLD?

From: Nate Lawson <nate_at_root.org>
Date: Sun, 2 Sep 2012 13:18:13 -0700
Message-Id: <95A013CF-BFC4-4522-82A3-A63425BA8B92@root.org>
On Sep 1, 2012, at 6:36 PM, Mark McDougall wrote:

> On 2/09/2012 10:42 AM, "André Fachat" wrote:
> 
>> Another question is the development environment. One reason I chose
>> Xilinx for my design for example was because the webpack IDE is free and
>> runs on Linux as well.
> 
> Altera Quartus is free, runs on Linux, and is a far superior piece of software to Xilinx ISE. Also better for noobs, and is the same as that used for C-One & Turbo Chameleon.
> 
> Whilst there are 5V tolerant CPLDs, you'll need level shifting for FPGAs as they're mostly low-voltage these days.


I agree. Here were some thoughts I had in interfacing FPGAs to old systems.

http://rdist.root.org/2012/01/06/mixed-voltage-interfacing-for-design-or-hacking/

-Nate


       Message was sent through the cbm-hackers mailing list
Received on 2012-09-02 22:00:05

Archive generated by hypermail 2.2.0.