> Hmm, now I got another question: What was the mysterious "always > set this bit to 0" in the VIC-II? Was it used in some early 6567 > revision? I do not remember any effect when I set it on any of the > 6567 or 6569 that I had. > > D016 53270 VIC Control Register > 7-6 Unused > 5 ALWAYS SET THIS BIT TO 0 ! > 4 Multi-Color Mode: 1 = Enable (Text or > Bit-Map) > 3 Select 38/40 Column Text Display: > 1 = 40 Cols > 2-0 Smooth Scroll to X Pos That's the RESET bit. On the 8565R2, it's a register bit but not connected to anything; on the 6569R1, it's a register bit that connects to a little end of metal and poly, well with a cut actually, and then ends nowhere, not clear where it would go. Supposedly this bit had a function on the predecessor to the VIC-II, the 6566(?), which was SRAM instead of DRAM. It's quite clear on the 6569 that the DRAM stuff (address muxes, RAS/CAS, etc.) was tucked on; on the 8565 it's cleaned up a bit (it has a different pad ring). Perhaps RESET stopped all memory accesses, and/or forced the X and/or Y counters to 0. If anyone has such a chip, feel free to send it to visual6502 for picturing and analysis :-) > This is not to be confused with the C128 VIC-IIe test mode bit in > $d02f or $d030 that really does something. This would not be the > first bit that has been disabled in a Commodore video chip. In the > NTSC VIC-I, there is a bit for enabling interlace mode. It does not > work in the PAL VIC-I. I wrote a test program for it: look for > interlace.prg and interlace.tar.gz at http://zimmers.net/anonftp/ > pub/cbm/vic20/programming/. We have a 6561 as well... Let's see, reg 00 bit 7... It's wired up, goes to the Y decoder, and the one output from there is wired up as well. I don't have further details, I haven't fully reversed this chip (yet). I guess the interlace doesn't work as intended, but it's still there? Segher Message was sent through the cbm-hackers mailing listReceived on 2011-08-25 20:00:29
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