From: Baltissen, GJPAA (Ruud) (ruud.baltissen_at_abp.nl)
Date: 2004-07-22 07:54:27
Hallo allemaal,
Yesterday I built this 'ATN-trap' that negates NDAC and NRFD when ATN is
pulled (LO). So far I can say it works great! A basicline that performed 25
"diRu9"s in row worked W/O any error, something that was impossible with the
old situation.
But what puzzles me is that I already got this performance when I only
changed one part of the software: the part that just hangs around and waits
for an ATN:
InitIEEE;
>> port[$3F8] := 1; { activate ATN-interface
}
pbo := False;
{ Wait until keypressed or ATN found }
repeat
inc(w2);
if w2 mod 1000 = 0 then pbo := KeyPressed;
until pbo or (Port[wLPTstatus] and $40 = 0);
>> port[$3F8] := 3; { de-activate
ATN-interface }
NdacLo;
How did I do it?
The base of the idea is to use two 74LS38 OC NAND-gates to pull NDAC and
NRFD (L) when needed. Another gate inverts ATN and steers one of the two
inputs of these two gates. RTS of COM1 steers a BC546 transitor through a
diode and a resistor (33K). A 180 K resistor makes sure the base of the
BC546 is pulled (L) when RTS is negative. The collector is connected to the
other inputs of the two gates.
- RTS = -12V: ATN can negate NDAC and NRFD
- RTS = 12V: ATN cannot negate NDAC and NRFD
To supply the 74LS38 with 5V I used three diodes to tap power from TxD, DTR
and RTS. A capacitor and a 78L05 take care of the rest. The software has to
switch these lines (H) of course.
--
___
/ __|__
/ / |_/ Groetjes, Ruud
\ \__|_\
\___| URL: Ruud.C64.org
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