ncoplin_at_orbeng.com
Date: 2004-05-06 08:58:31
Hello Ruud,
>the RDY-input but I need it for debugging purposes. And I noticed that the
>573 latched the data instead of the address that the 65816 normally
presents
>when PHI2 = (L). This means that the clock for the 573 needs to be
Why is it that this should happen? According to the WDC datasheed (and
example circuit) the clock signal to the 74573 is same as the clock applied
to the 65816 - no further phasing needed?
- Nick
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