From: Marko Mäkelä (marko.makela_at_hut.fi)
Date: 2003-09-24 13:35:11
On Wed, Sep 24, 2003 at 03:35:53PM +0800, email@example.com wrote: > One thing I didn't uderstand from the schematic (not being able to read > german) is how are the LEDs refreshed... is the memory location accessed > often enough that the display is updated and steadily lit? The address lines of the 2764 EPROM are fed by the data lines of the 6502 bus. It looks like the comparators in t&s-display3.jpg, the figure with the caption "Der Schaltplan des Moduls" generate a latching signal for the BCD-to-7segment decoders. In other words, the outputs of the EPROM are changing all the time, and only when the address matches with the ones set with the jumpers, one pair of the four 7-segment display drivers latches the inputs. Page 1 of the article mentions that the LCD display (as opposed to the LED display) needs a 30 Hz to 100 Hz frequency on pin 1. It looks like this frequency is generated with the capacitor-and-resistor-and-inverter circuit on the right side of the EPROM. Marko Message was sent through the cbm-hackers mailing list
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