From: Marko Mäkelä (marko.makela_at_hut.fi)
Date: 2003-06-24 23:37:00
On Wed, Jun 25, 2003 at 12:16:00AM +0300, Gianmario.Scotti@nokia.com wrote:
> See, I was referring to this design you had two years ago.
The first prototype was with a low-voltage 2-megabyte flash chip. All
signals to it were routed through a 5-volt tolerant low-voltage CPLD.
It could have worked, but soldering the CPLD would have been a major
challenge in mass production.
The second prototype (the first working one) was a 5-volt only design,
with a 512-kilobyte flash chip. The Lattice chip was in PLCC case.
To simplify the circuit board, I permuted the address and data lines
of the flash chip, so writing the "unlock" commands is a bit tricky.
The current prototype has the memory chips in SO28 and SO44 cases and
the CPLD in a TQFP case instead of PLCC, because it should be a little
cheaper while still relatively easy to solder (rougly quad density compared
to solder-through components). The Am29F032B has a very nice pin-out, and
thus I only had to swap the two least significant address bits with each
other. In other words, the unlock commands can be written easily without
touching the bank switch registers.
Marko
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