RE: Layout floating point numbers

From: Gideon Zweijtzer (
Date: 2002-10-07 06:40:24

>On 06-Oct-02, Gideon wrote:
>->You sound like the perfect guy to write the C/C++ compiler for
>the 65GZ032!!

willi>    This is the first I've heard of  65GZ032.  What is it?

groepaz> eh? wtf IS a 65GZ032 ? SCPU on acid ? :=D

After successfully making a 6510 on an FPGA, I took a step further and am
now working on the 'gz032'; a 32-bit fully pipelined cpu, with cache etc
that also runs 6502 code (with the exception of illegal instructions; those
are used to access the 16 and 32-bit instructions). It has 4 gigs of address
space; accessible without banking mechanism; just like you would expect from
a 32-bit cpu. Although it will also run existing 6502 code really fast
(approx. 100 times a 1 MHz 6510), it will give you more performance (about
the same as a 25 MHz 68EC040) when you use the 32-bits instructions. So that
is why a compiler would really come in handy!

For the ones that want to have it tomorrow - I am sorry; it is still under
development. Sure enough, I have made a design document for this CPU in
which the encoding of all instructions is listed. If you want to call it
"vaporware", please feel free. I'll make sure that within some months the
real thing is on my desk, or on yours if you are nice to me! ;)


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