Re: C128 and 8MHz Z80

From: David Wood (
Date: 2002-07-29 13:24:55

En contrare my friend. :)

The 65816 (and the 65802?) has lines that determine when memory's being
accessed versus random blind accesses.  Have a close look at the
documentation, and you'll see tis even possible to determine if the memory
being fetched is program or data, or even further, interrupt vectors. ;)


On Mon, 29 Jul 2002, Nicolas Welte wrote:

> Hi Nick,
> wrote:
> > Could you identify which chips/pins these other wires go to? Do you think
> > that this would be a easy way to also engineer a faster 65802 CPU into the
> > C128? In the past I tried doing something on the by multiplying the clock
> > phase on the 8502 side, but as the RAS and CAS signals are produced by the
> > VIC it would crash. How does the Z80 get away with it?
> Reengineering this device is one thing on my to-do list, of course. First
> comes building that GAL-Blast device to read out the GAL, if it isn't
> protected.
> As I understand the circuit, it runs the Z80 at 8MHz until it requests a
> memory access. Then it is halted by the GAL until it is time for Z80 memory
> accesses. The original Commodore way is different: The Z80 is run at 4MHz
> half of a 1MHz Phi2 cycle, and during the other half it is halted completely
> to allow for a memory access, not matter if it is needed or not. 
> This only works for the Z80 with its extra status lines that signal memory
> and i/o accesses, with a 6502 family member you're out of luck with such a
> simple approach. IMO the speedup for the Z80 will only be effective for
> opcodes that eat up a lot of cycles. Short opcodes with lots of memory
> accesses will be as slow as ever, I guess.
> A few days ago I also found an advertisment for this device in an old 64'er
> issue from '89: The device was sold by Rossmöller for DM 99, they also had an
> 8MHz CP/M cartridge for the C64, which also sold for DM 99! An 8MHz CP/M
> cartridge for the C64 was also published by c't magazine:
> For a faster 6502 you have to do it just the other way around: Run the 6502
> on its own fast memory subsystem and give the VIC/DMA system some memory
> access slots to this fast memory. You have to buffer the data for the slow
> VIC with latches, so the data that is fetched at 8MHz is still accessible to
> the 2MHz device. 
> Nicolas
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