From: Gideon Zweijtzer (gideonz_at_dds.nl)
Date: 2002-05-02 09:07:27
|>program it in the MMU for which pages this applies (Note that on the C-64,
|>the bus bandwidth to memory is only 1 MB/s!! Fortunately, this is a lot
|
|But why limit ourselves to this? 1MB/s applies to most I/O chips on the C64
| [...]
|be able to squeaze several writes in the valid 500ns ==> 2MB/s, 3MB/s or
|4MB/s.
In the C-64, the VIC generates the DRAM timing, so we are just stuck with 1
MB/s to main board memory and/or I/O. Even IF you would be able to get 4
MB/s out of it, it is still nothing compared to the 100+ MB/s of the SDRAM
(32 bits at 33 MHz, my current reasonable target).
So, I think the best we can go for is to program the MMU such that no
unnecessary writes/reads are done to/from the main board.
Gideon
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