RE: 6510 CPU extensions

From: Gideon Zweijtzer (
Date: 2002-05-02 08:07:59

  • Next message: "RE: 6510 CPU extensions"
    |Hello Gideon,
    |>"thinking" that they are running from $0000-$ffff. Another feature will be
    |>protection and bus-selection. The latter is necessary to define regions
    |>are not memory, but I/O. Memory accesses will go to the SDRAM bus, I/O
    |>accesses to the original address/data bus.
    |Memory accesses (at least selected ones) need also go to the original
    |address/data bus elsewise the VIC chip will not see anything to display?
    It is a good thing that you mentioned this.  This means that the MMU
    requires to have a mode to support writeback or write through to the I/O bus
    as well. Of course it should be selectable, so that's up to the user to
    program it in the MMU for which pages this applies (Note that on the C-64,
    the bus bandwidth to memory is only 1 MB/s!! Fortunately, this is a lot
    higher already on the C=1, but still less than the SDRAM bus). I would have
    found out sooner or later, but it's better to include it in the design from
    the beginning.
           Message was sent through the cbm-hackers mailing list

    Archive generated by hypermail 2.1.4.