Thanks Levente,
>> Whilst the 5717 chip is waiting to read the "sync" going low, what is it
>> doing with the line that is connect to the same POTX via the resistor? Is
it
>> being driven low, hi or held in the MOS equivalent of O/C?
>(As I noticed, Delphion has dropped providing free download service, so
>the 1351 patents aren't freely available anymore :-/. I have the patents
>somewhere -- I've saved them onto a CD, should I post them tomorrow?).
Not necessary, I also burnt a copy to CD (somewhere.....)
>I'd say the outputs are left floating.
>At the end of the 512 cycles long process, in cycle #480, the 5717 stops
>driving both POT outputs (I clearly remember this, I even noted it
Does the PIC change the output lines to "input mode" in order to achieve the
floating behaviour.
Thanks again, Nick
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