On Sun, 30 Dec 2001, Ethan Dicks wrote:
> When I used to make Qbus and VAXBI intellegent serial cards, we recycled
> our 74S409-based refresh scheme for our final product - the 409 is happy
> with 64K and 256K refresh cycles (and we had pounds and pounds of them).
Probably it has a 9 bit refresh counter. Couldn't find a datasheet for it
anywhere.
> We went from a 41256 design to a 44256 design with no strangenesses. The
> 44256 was common at one point (it was the DIP RAM found on a C= A2091
> disk controller and in the A590 disk side-car).
That would work if the 74S409 already has a 9 bit refresh counter, or your
DRAM chips had a different refreshing scheme. The 414256 datasheet I found
specifies a 512 cycle refresh scheme, with the other refresh types also
possible. Obviously for RAS-only this is a 9 bit counter.
http://www.oki.co.jp/semi/datadocs/doc-eng/msm514256c.pdf
> If you were planning on recycling the REU chips into a different design
> with more RAM and you could find enough 44256 chips to make it worthwhile,
> that's one way to go. It's not line 1Mx8 chips are easy to find, either.
Hehe. I still have a vast stockpile of old DRAM chips. Used one 41256 the
other day in an MSX-AUDIO sample RAM upgrade. Anyone needing some for a
project should get in touch.
Richard
Message was sent through the cbm-hackers mailing list
Archive generated by hypermail 2.1.1.