Hello Ruud,
>So what gives you the idea it does negate the lines?
The diagnostics built into 64HDD show that when the U0>M1 is sent to a real
1571 (64HDD is just listening and not taking action) the ATN line and Data
line are for sure negative, enough to time-out the Wait_For_CLOCK(RELEASE)
routine three times (about 1.5seconds). This suggests to me that all three
lines are "held" low for the period... not expecting it to be logical for
the ROM routines to do it... I though perhaps it was caused by the drive
"re-booting" when switching modes.. it definitely involves some mechanical
noises. The drive does work in both modes....
Do you know what comes after the check for 1 or 0. It needs to step-up to
2MHz, could the circuit associated with this be the cause?
- Nick
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