> The Lattice ispLSI 2064VE has 64 programmable I/O pins and 64 latches
> (8 bytes of memory). The I/O pin count is not a problem [...] But the
> memory is a little tight.
Why not using a Xilinx FPGA. The price is almost the same or even lower as
a 15k-gate Spartan should be way enough, but it offers much more
flexibility in terms of RAM (real RAM!), FFs and routability.
The drawback is that you need to boot it from a serial (E)EPROM or
parallel using e.g. the host computer. But since the C64 already needs a
few seconds to be fully initialized the serial method shouldn't be
noticeable anyway.
Rainer
--
Rainer Buchty, LRR, Technical University of Munich
Phone: +49 89 289-28401, Fax +49 89 289-28232, Room S3240
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