Hallo Nicolas, Nick,
> ... and then reads some crap.
Very logical explanation but ... (see "bad-lines")
> How do you handle the CPU shutdown?
By connecting the AEC-signal directly to the BE-input of the 65816. The 245
buffer is disabled by AEC through a NAND-gate as well. And I may assume that
the 6526 only is able to output data when PHI2 is (H).
It just occured to me that the 6526 is enabled when the address is
$0000/0001. But the SCH does also allow this when the VIC steals cycles !!!
And this can be checked by simply removing it. (I got that idea when writing
the previous email)
> ... this will limit bad-lines ...
I'm not so familiar with bad-lines. I always thought that bad-lines only
occured in graphic mode? If they also occur in text mode, then we have a
first possible explanation for the phenomene.
But this means that the address $0000/1 must occure as well if the 6526 is
the cause of the problem. Does it?
If the 6526 is the problem, the solution is simple. I replace the 682 with a
688. The 682 has no input, the 688 has and it is fed with the inverted AEC
signal. So the 6526 can only become active the moment the 65816 is not
tristated.
Only five minutes work :)
___
/ __|__
/ / |_/ Groetjes, Ruud
\ \__|_\
\___| http://Ruud.C64.org
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