Spiro Trikaliotis wrote: > I remember seeing an article giving a solution to this problem by delaying > one edge (according to your description, it must be the rising one) of PHI2. > Anyway, I don't know where that was. Anyway, I remember that the author also > mentioned that in most cases, this delaying is not necessary in reality, so > the 6522 (or 6821, with the same problem) should work good in the C64, too. I remember that one approach was to delay Phi2 with an LS74 flipflop by one dotclock cycle, but I'm pretty sure that the 6821 does not need this delay. I have a few 6821 expansion port circuits (like IEEE488 interfaces, or the Formel 64 module, the Prologic DOS expansion port interface, the Quickbyte II Eprommer) and none of them uses a clock delay. Nicolas - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail email@example.com.
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