RE: VIA shift register "bug"

From: Robert Di Benedetto <*robert_at_mycoolmail.com*> Date: Sat, 3 Feb 2024 16:08:22 +0000 Message-ID: <400a316549b04e2f99e44c945c614b11_at_mycoolmail.com> · robert_at_mycoolmail.com

Dumb question but - if WDC revs the mask and adds asynchronous support, does this mean that simply replacing the VIA's in the stock C64 and 1541 gets us faster I/O?  Or is additional modification needed?

-----Original Message-----
From: A. Fachat <afachat_at_gmx.de> 
Sent: Saturday, February 3, 2024 5:30 AM
To: cbm-hackers_at_musoftware.de
Subject: VIA shift register "bug"

Hallo all,

in case you haven't noticed, I have investigated the VIA shift register bug together with Dave McMurtrie and Martin Thierer, and got some news from WDC about it - all published in my latest two YT videos (still have to write it up...)

The VIA shift register bug: https://youtu.be/6cwVQahVCdc

The VIA followup: https://youtu.be/nvnz_34uWSg

Oh, btw. I implemented the Commodore Fast Serial bus with a VIA shift register as well. Code is here
https://github.com/fachat/via-sr-bugtest/blob/main/fiec/upet-fiec-core.a65

Best regards,

André