Our notional accelerator could have logic to read ahead to cache storage device contents and then not have to slow down for IEC I/O. Justin > On May 2, 2023, at 04:02, smf <smf_at_null.net> wrote: > > I don't know how SCPU does it, but the way I thought to do (but haven't implemented it ever) would be at bootup switch to > > "Bits #0-#2: Configuration for memory areas $A000-$BFFF, $D000-$DFFF and $E000-$FFFF. Values: > > %x00: RAM visible in all three areas." > > You would need to cache the roms on the accelerator as they are no longer going to be visible at $A000/$E000. For speed you would want to do this anyway. > > While it would be possible to transfer the onboard roms, you will need patched roms that disable the turbo when accessing the IEC bus anyway. So it's probably best to have them loaded into fast ram on the accelerator from an sdcard. > > That leaves I/O mapped into D000-DFFF, whenever the accelarator does those accesses you would pull /GAME low and leave /EXROM high and I think that will override the $00/$01 setting and switch to ultimax mode. The timing of switching in and out of ultimax mode while avoiding VIC2 cycles will be kinda interesting. I think the power cartridge displays sprites from rom using ultimax mode https://rr.pokefinder.org/wiki/Power_Cartridge, so it should be possible. > > I would recommend implementing the SuperCPU v2 ram mirroring registers, so that software can control which areas of the accelerators fast ram will be copied into the c64's memory. If you implement the turbo control registers then you can use the existing roms too. > > On 23/04/2023 10:32, Maciej Witkowiak wrote: >> This got me thinking: how does a real SCPU handle access to $01 port? --Apple-Mail=_B41AC8B3-4F42-4F43-A9C6-CB2A7FD7A902 Content-Transfer-Encoding: 7bit Content-Type: text/html; charset=us-ascii <html><head><meta http-equiv="content-type" content="text/html; charset=us-ascii"></head><body style="overflow-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;">Our notional accelerator could have logic to read ahead to cache storage device contents and then not have to slow down for IEC I/O.<div><br></div><div>Justin<br><div><br><blockquote type="cite"><div>On May 2, 2023, at 04:02, smf <smf_at_null.net> wrote:</div><br class="Apple-interchange-newline"><div> <meta http-equiv="Content-Type" content="text/html; charset=UTF-8"> <div><p>I don't know how SCPU does it, but the way I thought to do (but haven't implemented it ever) would be at bootup switch to</p><p style="font-family: "Times New Roman"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;" align="JUSTIFY">"Bits #0-#2: Configuration for memory areas $A000-$BFFF, $D000-$DFFF and $E000-$FFFF. Values:</p> <ul style="font-family: "Times New Roman"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;"> <li><p align="JUSTIFY">%x00: RAM visible in all three areas."</p> </li> </ul><p>You would need to cache the roms on the accelerator as they are no longer going to be visible at $A000/$E000. For speed you would want to do this anyway.</p><p>While it would be possible to transfer the onboard roms, you will need patched roms that disable the turbo when accessing the IEC bus anyway. So it's probably best to have them loaded into fast ram on the accelerator from an sdcard.<br> </p><p>That leaves I/O mapped into D000-DFFF, whenever the accelarator does those accesses you would pull /GAME low and leave /EXROM high and I think that will override the $00/$01 setting and switch to ultimax mode. The timing of switching in and out of ultimax mode while avoiding VIC2 cycles will be kinda interesting. I think the power cartridge displays sprites from rom using ultimax mode <a class="moz-txt-link-freetext" href="https://rr.pokefinder.org/wiki/Power_Cartridge">https://rr.pokefinder.org/wiki/Power_Cartridge</a>, so it should be possible.<br> </p> <div class="moz-cite-prefix">I would recommend implementing the SuperCPU v2 ram mirroring registers, so that software can control which areas of the accelerators fast ram will be copied into the c64's memory. If you implement the turbo control registers then you can use the existing roms too.<br> </div> <div class="moz-cite-prefix"><br> </div> <div class="moz-cite-prefix">On 23/04/2023 10:32, Maciej Witkowiak wrote:<br> </div> <blockquote type="cite" cite="mid:CAB+mWqsqjBXxSfkC369psVG9j5tURp50+MX7w=iS78o6UUMxgw_at_mail.gmail.com"> <meta http-equiv="content-type" content="text/html; charset=UTF-8"> <div dir="ltr">This got me thinking: how does a real SCPU handle access to $01 port?</div> </blockquote> </div> </div></blockquote></div><br></div></body></html> --Apple-Mail=_B41AC8B3-4F42-4F43-A9C6-CB2A7FD7A902-- --Apple-Mail=_B1BEA3B9-055B-4472-A9B7-7C245110B59B Content-Disposition: attachment; filename=smime.p7s Content-Type: application/pkcs7-signature; name=smime.p7s Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCCd4w ggS8MIIDpKADAgECAhB4SqkSGNGkJghRPNNmVUOjMA0GCSqGSIb3DQEBCwUAMEwxIDAeBgNVBAsT F0dsb2JhbFNpZ24gUm9vdCBDQSAtIFIzMRMwEQYDVQQKEwpHbG9iYWxTaWduMRMwEQYDVQQDEwpH bG9iYWxTaWduMB4XDTIwMDkxNjAwMDAwMFoXDTI5MDMxODAwMDAwMFowWzELMAkGA1UEBhMCQkUx GTAXBgNVBAoTEEdsb2JhbFNpZ24gbnYtc2ExMTAvBgNVBAMTKEdsb2JhbFNpZ24gR0NDIFIzIFBl cnNvbmFsU2lnbiAxIENBIDIwMjAwggEiMA0GCSqGSIb3DQEBAQUAA4IBDwAwggEKAoIBAQC/G8kG oRqlq7Hb/Pcnt8WyVE5aMpUnmsIx9YayDXt2YPs1KcbtKmhrx3eG1eyWzUgzGg7w/Ki5BqM1Cpia VijGKeWp6cw2/sInIQow4C2CUGYPoL9ALuRP51LHgd9JOzzGa/y94k6V0zMXxL8ESf+0PjD8O+mD 6hc6oPI6Ic9NpxEUrRAeirl4RsGZVLxbSvBxpGi0718ZMD42MXQzLsYtE0rR4w8aHaFw9lRFCFfL vBFDxcUh8QDqRpAcc3badydW3CqJOYDBNH7gY01WKcbcqM1ksBVKcat0K9PYjhmjX2ErLk9fqjvC tVe8xHjNXlUEXBXpkMz7F7Bqjsy6n5JvAgMBAAGjggGJMIIBhTAOBgNVHQ8BAf8EBAMCAYYwHQYD VR0lBBYwFAYIKwYBBQUHAwIGCCsGAQUFBwMEMBIGA1UdEwEB/wQIMAYBAf8CAQAwHQYDVR0OBBYE FIW78MzENrUKYnajmS6PuzpqrcVRMB8GA1UdIwQYMBaAFI/wS3+oLkUkrk1Q+mOai97i3Ru8MHoG CCsGAQUFBwEBBG4wbDAtBggrBgEFBQcwAYYhaHR0cDovL29jc3AuZ2xvYmFsc2lnbi5jb20vcm9v dHIzMDsGCCsGAQUFBzAChi9odHRwOi8vc2VjdXJlLmdsb2JhbHNpZ24uY29tL2NhY2VydC9yb290 LXIzLmNydDA2BgNVHR8ELzAtMCugKaAnhiVodHRwOi8vY3JsLmdsb2JhbHNpZ24uY29tL3Jvb3Qt cjMuY3JsMEwGA1UdIARFMEMwQQYJKwYBBAGgMgEoMDQwMgYIKwYBBQUHAgEWJmh0dHBzOi8vd3d3 Lmdsb2JhbHNpZ24uY29tL3JlcG9zaXRvcnkvMA0GCSqGSIb3DQEBCwUAA4IBAQBZa2qO7XaDnbgV 0PYfBRdTWtLF4zlpJTVxQLVX/EGNdbQiMDv/f+8bZyJ6088/+DeWmhB49UmlAApmaXzV8fA8+K8U r0lrjWMmSCobOQ5FILTFiSHaAZ5CDUlVoLNytHMkSVGNPjjaboWlsscJ5vEgcu7RYE2Mtmt4Hoxg xqp08voi1te0P8FTiTnXtwS5RtzOgEVkCtqOruhQFZe6uiWfkAydHBU3CAk3g2nSziSQn3gp6nNs U4vNxud9QHT7FPh+heZszQaaZw8Y7LSq+oQcmwHANlcPEiTyioKecueCLs33hKfh5Nyaln00fZ0M 3U5MQ9VeBEblfWkFw20xYbowMIIFGjCCBAKgAwIBAgIMEiM26p4/9crpWJ71MA0GCSqGSIb3DQEB CwUAMFsxCzAJBgNVBAYTAkJFMRkwFwYDVQQKExBHbG9iYWxTaWduIG52LXNhMTEwLwYDVQQDEyhH bG9iYWxTaWduIEdDQyBSMyBQZXJzb25hbFNpZ24gMSBDQSAyMDIwMB4XDTIyMDMwMzE2NDgxMVoX DTI1MDMwMzE2NDgxMVowUjEkMCIGA1UEAwwbc2hhZG93QGRhcmtzaWRlcmVzZWFyY2guY29tMSow KAYJKoZIhvcNAQkBFhtzaGFkb3dAZGFya3NpZGVyZXNlYXJjaC5jb20wggEiMA0GCSqGSIb3DQEB AQUAA4IBDwAwggEKAoIBAQCpDw8r9zMnSlgxpu4NudC4Xen655R9MLWZhJqrOiqhYNNFCvw4lTrt 5qXwLesOdZNduVB8eVIQXRaXEmgYhYI4bCI2eDxqY7/ueYF9ZgLxfYgyIYC2OCDXeuxF0WxyfOxP 7ViDtGJ/NrpIGszmZzGZYl2IBKwg8Ejvyh0DRPEqCjql8u34pLIQ5Z8Bx8ju3xVznYhZ3yr9nMrM wJwUdUsdKKSODHR1VpPxtOM+Gr31W00DptMVbErgcn/8L+lXHn3pu16PJgJ/PJW9MVVY256hRgoK CeEBCrFKKPQmLVyadDXxOYiqydJpDBhw2+m6ek9CpkRPF/cO4Q+217BvaHSJAgMBAAGjggHlMIIB 4TAOBgNVHQ8BAf8EBAMCBaAwgaMGCCsGAQUFBwEBBIGWMIGTME4GCCsGAQUFBzAChkJodHRwOi8v c2VjdXJlLmdsb2JhbHNpZ24uY29tL2NhY2VydC9nc2djY3IzcGVyc29uYWxzaWduMWNhMjAyMC5j cnQwQQYIKwYBBQUHMAGGNWh0dHA6Ly9vY3NwLmdsb2JhbHNpZ24uY29tL2dzZ2NjcjNwZXJzb25h bHNpZ24xY2EyMDIwMEwGA1UdIARFMEMwQQYJKwYBBAGgMgEoMDQwMgYIKwYBBQUHAgEWJmh0dHBz Oi8vd3d3Lmdsb2JhbHNpZ24uY29tL3JlcG9zaXRvcnkvMAkGA1UdEwQCMAAwSQYDVR0fBEIwQDA+ oDygOoY4aHR0cDovL2NybC5nbG9iYWxzaWduLmNvbS9nc2djY3IzcGVyc29uYWxzaWduMWNhMjAy MC5jcmwwJgYDVR0RBB8wHYEbc2hhZG93QGRhcmtzaWRlcmVzZWFyY2guY29tMB0GA1UdJQQWMBQG CCsGAQUFBwMCBggrBgEFBQcDBDAfBgNVHSMEGDAWgBSFu/DMxDa1CmJ2o5kuj7s6aq3FUTAdBgNV HQ4EFgQU4BKQGKnyXl/XjjK4orSOLatZk4wwDQYJKoZIhvcNAQELBQADggEBAB8gLjJ+duwBY3lt bu6chBwTKZErjKJzSyfT4OZED21OfJKPB2PIGSkUcEcwfspnKSwNQdLNKreCDaQ5TlpX2deiEfKz iqlIa+QdSUHhbQbX0XPkWf3v3PKuMegowX0V20uku8I1WXZc3O+g99UomtY3MkAstlffGysH0sDl oJ+ZQqcDAZFmB5uzzWscUeQHUazlbjIocMNNu5edOhRlUKZyOzXrjhEyIWgdPz8qEaTBdVsKmVH4 UUxQi9jIrOylV97J+h0mKqA8O8J+DdcJPImHOw4Od7Iz//ChyumaTRCsQ/86FSQy1BsnfOCwKrTc x5orjhNSJ02uOpjwIKeb7gkxggL9MIIC+QIBATBrMFsxCzAJBgNVBAYTAkJFMRkwFwYDVQQKExBH bG9iYWxTaWduIG52LXNhMTEwLwYDVQQDEyhHbG9iYWxTaWduIEdDQyBSMyBQZXJzb25hbFNpZ24g MSBDQSAyMDIwAgwSIzbqnj/1yulYnvUwDQYJYIZIAWUDBAIBBQCgggFjMBgGCSqGSIb3DQEJAzEL BgkqhkiG9w0BBwEwHAYJKoZIhvcNAQkFMQ8XDTIzMDUwMjEwMzM1NVowLwYJKoZIhvcNAQkEMSIE IPpbGDrevheNtLp9qeISI+6T6FomIbBM7sCm6+T4uaKNMHoGCSsGAQQBgjcQBDFtMGswWzELMAkG A1UEBhMCQkUxGTAXBgNVBAoTEEdsb2JhbFNpZ24gbnYtc2ExMTAvBgNVBAMTKEdsb2JhbFNpZ24g R0NDIFIzIFBlcnNvbmFsU2lnbiAxIENBIDIwMjACDBIjNuqeP/XK6Vie9TB8BgsqhkiG9w0BCRAC CzFtoGswWzELMAkGA1UEBhMCQkUxGTAXBgNVBAoTEEdsb2JhbFNpZ24gbnYtc2ExMTAvBgNVBAMT KEdsb2JhbFNpZ24gR0NDIFIzIFBlcnNvbmFsU2lnbiAxIENBIDIwMjACDBIjNuqeP/XK6Vie9TAN BgkqhkiG9w0BAQsFAASCAQAuR//9U33yqxKOCJO0BypinrxC82G/xHgvgHd5B0bpcrHw6A7imfxx Or9guKiOB66NZVystT47BQvY55/AjbrCceECRvNJaX4bSSYvQufDRc+dmW06ZNdVrV7OCRQ8c1sR x6WxoxoN1R24ZZJF3tZhDeZv+NM5BCVyJKp3q4ef27UQb0cYec7cKjqN9BEu9xfrU7uwIZo+9KdQ vRnSYf/PtH2YcwQF2J1tWt1k3iA6k7VcUhdFOPXJfcAfbjZNPL7vsgs1cdfS9g2t0JEBz+uihfUg s5kqMcQqPvSVEmfT9n+z7X/0EVfJFHhEIsPR6mj9Wpqq50TFM+64QQvHvPPqAAAAAAAA --Apple-Mail=_B1BEA3B9-055B-4472-A9B7-7C245110B59B--Received on 2023-05-02 13:00:08
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