On 10/3/2022 5:54 AM, smf wrote: > If $de is forced on the bus all the time, the keyboard polling isn't > going to disarm it. I didn't read the explanation as "all the time". When address bus = $fffa, tie data bus to $de. I *think* the description meant that $de would be asserted for $fffa and $fffb (in essence, address: 111111111111111X) which would drive the NMI vector to $dede, but then once the address != $fffa or $fffb, $de is not asserted. I assume the button latches a 0 on NMI, like it's the clock signal to a flip flop which clock a 0 to NMI, so NMI is driven to ground constantly until the "reset" signal comes to the flop from the joy port. Others know more about NMI behavior, but if NMI is low, I believe the vector is referenced, the CPU goes to that location, but NMI vector will not be pulled again until the RTI. If I'm right, the NMI routine merely has to stay engaged for > 1/60th of a second. I question the cord and connector and such, given the expense. I am thinking the reason is that the 1/60 signal implies the code is in the keyscan IRQ routine, so you are assured the reset signal will not affect the NMI latch at a time when the code is already in an ISR. JimReceived on 2022-10-03 17:04:12
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