Re: Theorizing: chip select lines as clock speed selectors in a overclocked 6510 on a C64

From: Jim Brain <brain_at_jbrain.com>
Date: Thu, 30 Jun 2022 03:41:00 -0500
Message-ID: <aefbe0ae-2090-f1dc-7e8b-85965f9607fe_at_jbrain.com>
On 6/30/2022 1:33 AM, Baltissen, GJPAA (Ruud) wrote:
> Hallo Jim,
>
>
>> Wouldn't that just be the falling edge of PHI2? Maybe I misunderstand.
> If a device accesses the C64/128 somewhere after the rising edge of PHI2, there is no guarantee that data has been written well or the read data is indeed the correct one. That's why I advise to check for a rising edge first. (and check BA as well, of course)

Hmm, your statement was:

"One thing you can do is to dream up a circuit that halts whatever wants 
to access the C64/128 until a _complete_ top half of PHI2 has been detected"

To me, that means stopping until PHI2 has went high *AND* went low, as 
only those two events signal that a complete top half of PHI2 has been 
seen.  But, if that's what you want, then triggering on the falling edge 
seems enough. (and yes, checking BA is needed as well).

Jim
Received on 2022-06-30 11:00:02

Archive generated by hypermail 2.3.0.