Re: Independent CPU/VIC-II setup

From: Jim Brain <brain_at_jbrain.com>
Date: Mon, 31 May 2021 13:38:55 -0500
Message-ID: <bc448ece-90b5-518b-7d8e-87d98a6414b9_at_jbrain.com>
On 5/31/2021 1:23 PM, Marko Mäkelä wrote:
>
> I understood that external accelerators are doing exactly that. They 
> only access the main bus in the computer for I/O and for video 
> memory.  Everything else is cached in the local RAM. They might cheat 
> and keep track on which 16KiB RAM bank is mapped to the VIC-II, and 
> avoid updating the internal RAM for anything that is outside that 
> 16KiB bank. 
The issue with that cheat is that the dev might set up GFX in bank 1 
while the VIC-II is pointing to bank 0, and then flip.  No mirrored data 
in Bank 1 until the flip.  TO combat, units eitehr mirror all memory or 
have a register where someone can give hints to the accelerator on what 
memory to mirror.
> Even for the first and third RAM bank, they could avoid writing to the 
> internal RAM, because the character ROM would always be mapped at 
> 0x1000..0x1fff and 0x9000..0x9fff. Does some accelerator work on the 
> Commodore 128 in 128 mode? In the 128 mode, the character ROM can be 
> disabled.

The SuperCPU 128 does, but it has a small daughtercard that sits under 
the MMU, which I assume then notices when char rom is mapped out.

Jim


>
>     Marko
>

-- 
Jim Brain
brain_at_jbrain.com
www.jbrain.com
Received on 2021-05-31 21:02:26

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