On 25/02/2021 10:50, silverdr_at_wfmh.org.pl wrote: > I remember our nice discussion about ancient kings (in the quantity of > one) and their vessels (in the same quantity). For you > reimplementation of mask-fabricated chips using an FPGA was an "emulation" Not only for me, but for the industry as a whole. https://www.xilinx.com/applications/emulation-prototyping/asic-emulation-in-action.html If you don't believe me then believe xilinx et al > Yes, there has to be some working logic on there. At the very least > the one needed to handle the actual gateware upload. But the blank > FPGA in its core function is not more turing complete than a (very) > large pile of, unconnected simple TTL chips. An FPGA has a structure for what the bitstream means, the unconnected TTL has no structure. If you had TTL chips that were connected together but had buffers and latches allowing you to reconfigure them at run time then it could be turing complete. An fpga isn't unconnected, the connections are there. As an analogy, the phone company doesn't have to send out an engineer to connect my phone line every time I wish to make a call. > They can form a turing complete system once laid out and connected > accordingly. But the mere fact that they exist on that huge pile > doesn't make them a "cpu before it's got a program loaded into > flash/ram/etc" No, it's turing complete even before you upload a bitstream. The same as a computer that is turned off is turing complete. > It does to the huge pile (or even an ordered stack) of unconnected > logic gates, doesn't it? Well technically all the connections possible in an fpga are made during manufacture, you're literally just turning routes on and off. Absolutely no different to how bits loaded from ram turn paths on and off in a cpu. > The same question I asked back then - Commodore used a programmable 82S100 for the original PLAs. Does that mean they used an "emulation of the real PLAs" that came later? Emulation is an intention, not a technical process. I can't read their mind, so my answer would only be a guess. As the original chip made it into production for a while I would guess they didn't have the intention to make something and only emulate it with an 82S100 for the time being. They emulated the c128 PLA with 74ls though https://hackaday.com/wp-content/uploads/2013/11/pla-emulator.png https://hackaday.com/wp-content/uploads/2013/11/c128-with-chip-emulators.png > Does that mean 82S100 based PLAs were cpus with turing complete ISA running a PLA program to emulate the real PLA and only the real, mask fabbed PLAs were not? No, an 82S100 or PLA isn't turing complete. Being turing complete is just a guarantee that you can emulate another turing system, it's possible to emulate other things without being turing complete. > True, there is no chip fab or 3d printer inside an FPGA. But there is an equivalent of a hard-working dude running quickly around and connecting wires to all the required inputs and outputs of a huge number of TTL chips so that they can form complex, turing complete (or not) systems. Once the wires are removed (FPGA powered off) we're back to the huge pile of simple, unordered components. Those aren't wires, there are just a load of gates being turned on and off. The same kind of gates being turned on and off in a cpu as it executes a program. There isn't a man running around inside your FPGA rewriting it, the same as there is no man rewiring your CPU as it's running software, or a man rewiring the telephone network when you place a call.Received on 2021-02-25 14:00:02
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