Re: FPGA using Python language

If you are talking about basically having an FPGA-based co-processor.... sure. You can load it a core of whatever CPU (that there is a core for the particular FPGA). You can do that but that's basically what we do when making a C64 computer in a cartridge but of course its more than that in that particular case. An FPGA based SuperCPU-like CPU accelerator is entirely doable that way. So is having other CPUs. 

Sure.... then again, if I am going to play the parallel computing game, why not use a GA144 from GreenArrays or if you really have the gumption to make a PCI-e interface or if using a PC.... use...say, an nVidia Tesla or Intel Xeon Phi.

What exactly is the goal here, guys?

>     On 02/21/2021 8:22 AM David Roberts <daver21145_at_gmail.com> wrote:
> 
> 
>     There are all sorts of developments happening in the area of FPGA development.
> 
>     One thing that has been available for a while is LabView FPGA-accelerated applications.
> 
>     I used Handle-C when it came out - developing FPGA code in a C-like ‘language’. The difference being that what has been ‘coded’ really spits out an FPGA bitstream and your ‘code’ executes on the hardware in logic (parallel) rather than sequentially by a CPU.
> 
>     Not heard specifically about Python though, so thanks for the link...
> 
>     Dave
> 
>     On Sun, 21 Feb 2021 at 16:03, smf <smf_at_null.net mailto:smf_at_null.net > wrote:
> 
>         > > Fpga's are turing complete programmable logic, VHDL is based on
> >         pascal/ada, verilog is based on C. There is no reason you can't write
> >         for them in python.
> > 
> >         https://www.digikey.co.uk/en/articles/build-and-program-fpga-based-designs-quickly-python-jupyter-notebooks
> > 
> >         On 21/02/2021 07:24, admin_at_wavestarinteractive.com mailto:admin_at_wavestarinteractive.com
> >         admin_at_wavestarinteractive.com mailto:admin_at_wavestarinteractive.com wrote:
> >         > *scratches head*
> >         >
> >         > First off, FPGAs requires a hardware description language and special tools to "compile" it to a logical binary file that configures the FPGA logic gates and all.
> > 
> > 
> >     >