Re: FPGATED prototype

From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de>
Date: Mon, 18 Jan 2021 14:58:24 +0100
Message-ID: <2df111a0-7a18-c59e-7609-aadf4d901178_at_laosinh.s.bawue.de>
On 1/18/21 2:04 PM, Jim Brain wrote:
> On 1/18/2021 6:19 AM, Gerrit Heitsch wrote:
>> On 1/18/21 1:03 PM, silverdr_at_wfmh.org.pl wrote:
>>>
>>>
>>>> On 2021-01-17, at 12:58, Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de> 
>>>> wrote:
>>>>
>>>> On 1/17/21 12:34 PM, Istvan Hegedus wrote:
>>>>> Hi Jim,
>>>>> Ok I send you a PM. Note however that I need the 48 pin one. 40 pin 
>>>>> one is
>>>>> good for 8501 replacement.
>>>>
>>>> You should also be able to use 2 x 24pin type. I have done that with 
>>>> sockets when replacing the TED socket on 264 systems.
>>>
>>> Surface mounted? TH is fine but I wouldn't trust the SM variant not 
>>> to be a potential POF without the reinforcement coming from the two 
>>> being bound as a single socket. There are sizeable forces at play 
>>> when inserting/removing.
>>
>> It's still 2 rows of 12 pins which are bound together per 24 pin type. 
>> And then 2 of those.
>>
>> I think that should work.
>>
>>  Gerrit
>>
>>
> I think he and I misunderstood your idea as suggesting a 1x24 (one side) 
> SMT header as opposed to using 2 2x12 SMT headers.

I agree that that wouldn't be stable.

  Gerrit
Received on 2021-01-18 16:00:02

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